Oracle is announcing enhancements to the SPARC Enterprise M-Series family of servers A new processor upgrade, the SPARC64 VII+, will be available starting in December and rolling out in 2011 Offers customers another system upgrade, preserving investment protection in existing M-Series frames Improves performance over prior generation CPUs while continuing commitment to mission-critical reliability Details: SPARC64 VII+ (2.66GHz) Only for M4000/M5000 New CPUM: 2 x SPARC64 VII+ cpus 2.66 GHz and 11MB of L2$ New MOBO_B to support new SC+ SC ASICs on original MOBO can only address up to 6MB of L2$ Mixing SPARC64 VI, VII/VII+ in the same domain is supported Details: SPARC64 VII+ (3.0GHz) Only for M8000 and M9000 3.0 GHz and 12MB of L2$ Can be placed on new CMU_C board Can be placed on existing CMU boards in the field New CMU_C board 2 or 4 processors Has new SC+ chip, as well as earlier released MAC+ SC ASICs on original CMU or CMU_B can only address up to 6MB of L2$ Will support all SPARC64 versions Mixing SPARC64 VI, VII/VII+ in the same domain is supported All processors run at rated speed and are not clocked down SPARC64 VII/VII+ Support The SPARC64 VI processor and the SPARC64 VII/VII+ processor can be mounted in a mixed configuration. Upgrade Solaris and XCP before using SPARC64 VII/VII+ Use the XCP command “setdomainmode” cpumode 2 modes for this function: auto - Automatically determines the operational mode of CPU at domain startup (default) compatible - Regardless of the CPUs mounted, sets the operational mode of CPU to the SPARC64 VI compatible mode. Mixing VII+ Processors With VI or VII Processors To achieve the 11MB or 12MB L2$ capacity, two conditions must be met: All four processors on the system board must be SPARC64 VII+. None of the four can be either SPARC64 VI or SPARC64 VII. The motherboard on the M4000/M5000 must be at least version MOBO_B, and the CMU on the M8000/M9000 must be at least version CMU_C The new MOBO_B and CMU_C have the new SC+ chip, which will provide L2$ addressing up to 12MB. When SPARC64 VII+ is set to half of its L2$, a message notifying this event, will be displayed and logged. While new systems will have the SC+, existing customers may want to upgrade their motherboards on the M4000/M5000 so they can fully utilize the 11MB of L2$.
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